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ds:projects:cryring:bpmboot

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CryringBPM

Boot Procedure

After complete power cycle all AFCs should boot itself. Before CPU is going to boot MATPEX card need to be enabled.

Login to sdlx008.acc.gsi.de over SSH and connect to MCH console

#Left MCH
screen /dev/ttyACM0 19200   (STRG A + STRG D to detach vom screen)
#Right MCH
screen /dev/ttyACM1 19200

List all FRU using command show_fru

MATPEX occupies slot AMC2 (fru id 6)

After typing fru_start 6 MATPEX should go into state M4

After all modules are running you may enable CPU using command fru_start 5

FPGA boot/reset

Login to sdlx008.acc.gsi.de over SSH and check if hw server is running. If not type:

/opt/Xilinx/HWSRVR/2017.1/bin/hw_server

Open VivadoLab 2017.1 Open Hadware Manager session connect to sdlx008 jtag server

download scansta JTAG switch script https://raw.githubusercontent.com/qermit/AfcJtag/master/scansta_afc.tcl

source AxiJtag/scansta_afc.tcl
connect_hw_server -url sdlx008.acc.gsi.de:3121
scansta_enable_all

From FPGA context menu (right mous click on xc7a200t) select Boot from configuration memory

CPU need to be rebooted after FPGA boot.

FPGA paritial reset

Connect over JTAG to a module, probe file required

ds/projects/cryring/bpmboot.1539257749.txt.gz · Last modified: 2018/10/11 13:35 by tobiashoffmann