<code vhdl>

# location constraints

#net clk_0p001 loc = p32; #net clk_10 loc = p30; #net clk_10_n loc = p38;

net trafo_signals<0>[0] loc = p9; net trafo_signals<0>[1] loc = p10; net trafo_signals<0>[2] loc = p11; net trafo_signals<0>[3] loc = p12; net trafo_signals<0>[4] loc = p13;

net trafo_signals<1>[0] loc = p14; net trafo_signals<1>[1] loc = p15; net trafo_signals<1>[2] loc = p16; net trafo_signals<1>[3] loc = p17; net trafo_signals<1>[4] loc = p19;

net trafo_signals<2>[0] loc = p20; net trafo_signals<2>[1] loc = p21; net trafo_signals<2>[2] loc = p22; net trafo_signals<2>[3] loc = p23; net trafo_signals<2>[4] loc = p24;

net trafo_signals<3>[0] loc = p34; net trafo_signals<3>[1] loc = p35; net trafo_signals<3>[2] loc = p39; net trafo_signals<3>[3] loc = p40; net trafo_signals<3>[4] loc = p41;

net trafo_signals<4>[0] loc = p50; net trafo_signals<4>[1] loc = p51; net trafo_signals<4>[2] loc = p52; net trafo_signals<4>[3] loc = p53; net trafo_signals<4>[4] loc = p54;

net trafo_signals<5>[0] loc = p64; net trafo_signals<5>[1] loc = p66; net trafo_signals<5>[2] loc = p68; net trafo_signals<5>[3] loc = p69; net trafo_signals<5>[4] loc = p70;

net trafo_signals<6>[0] loc = p74; net trafo_signals<6>[1] loc = p75; net trafo_signals<6>[2] loc = p76; net trafo_signals<6>[3] loc = p77; net trafo_signals<6>[4] loc = p78;

net trafo_signals<7>[0] loc = p79; net trafo_signals<7>[1] loc = p80; net trafo_signals<7>[2] loc = p81; net trafo_signals<7>[3] loc = p82; net trafo_signals<7>[4] loc = p83;

net stroke<0> loc = p110; net stroke<1> loc = p111; net stroke<2> loc = p112; net stroke<3> loc = p113; net stroke<4> loc = p115;

net period_counter<0> loc = p117; net period_counter<1> loc = p118; net period_counter<2> loc = p119; net period_counter<3> loc = p120;

net knob_select<0> loc = p28; net knob_select<1> loc = p31; net knob_select<2> loc = p33; net knob_select<3> loc = p27;

net display_mode<0> loc = p45; net display_mode<1> loc = p46; net display_mode<2> loc = p48;

net decode_signal loc = p49;

net led_rows_red<0> loc = p91; net led_rows_red<1> loc = p92; net led_rows_red<2> loc = p93; net led_rows_red<3> loc = p94; net led_rows_red<4> loc = p95; net led_rows_red<5> loc = p96; net led_rows_red<6> loc = p97; net led_rows_red<7> loc = p98;

net led_rows_green<0> loc = p100; net led_rows_green<1> loc = p101; net led_rows_green<2> loc = p102; net led_rows_green<3> loc = p103; net led_rows_green<4> loc = p104; net led_rows_green<5> loc = p105; net led_rows_green<6> loc = p106; net led_rows_green<7> loc = p107;

# timing constraints

#net clk_0p001 period = 1000000; #net clk_10 period = 100; #net clk_10_n period = 100;

</code vhdl>