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ds:software:hdl

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FMC

WR Cores

WB Scaler

master_mode ⇒ PIPELINED

master_granularity ⇒ WORD

Register map

Register Address Default Value Description
SC 0b000 0x00000001
Countermap 0b001 0x08040201
LatchMap 0b010 0x00000010
StartStopMap 0b011 0x00000080
CCounter 0b100 0x00000000
LCounter 0b101 0x00000000
OCounter 0b110 0x00000000
FCounter 0b111 0xFFFFFFFF

Register description

SC (0b000)

Bits hex Name R/W Description
0 (0x01) empty rw
1 full r
2 threshold r
3 (0x08) running rw
4 (0x10) stop w
5 (0x20) load_current w
6 (0x40) load_fifo w
11 - 8 counter_ovf r

Countermap (0b001)

Bits Name R/W Description
7 - 0 counter[0] rw
15 - 8 counter[1] rw
23 - 16 counter[2] rw
31 - 24 counter[3] rw

WB GPIO Raw

  • g_master_mode ⇒ CLASSIC
  • g_master_granularity ⇒ WORD
Register Address Default Value Description
CODR 0b000 0x00000000
SODR 0b001 0x00000000
DDR 0b010 0x00000000
PSR 0b011 0x00000000
TR 0b100 0x00000000
AFR 0b101 0x00000000
ds/software/hdl.1454921621.txt.gz · Last modified: 2016/02/08 09:53 by pmiedzik