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--- projects:maps:mapsadapter:analogsignalmodul:overview [2020/07/03 21:26]
carsten [1.) Signal flow for ADC-gate (Trigger)]
+++ projects:maps:mapsadapter:analogsignalmodul:overview [2020/07/05 11:53] (current)
carsten [3.) Internal pictures]
@@ Line 23: / Line 23: @@
 ===== 3.) Internal pictures =====
+Grey comments are possible adptions to MAPS2020!
 ^  Front  ^  Back  ^ ^
-|  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302067.jpg?nolink&300 |}}  |  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302068.jpg?nolink&300 |}}  | Front and back of one of four submodules:\\ \\ __Front: 4x board with each:__\\ 1x Front 68pol connector to NI-ADC (8 channel)\\ ⇒ 2x RJ45 (4 channel) = Σ 8x RJ45\\ 1x LEMO 00 monitor output\\ ⇒ 4x trigger @ X2 connector\\ \\ __Back:__\\ 1x LEMO 00 Timing input\\ 8x LEMO 00 diff. analog input per trafo (internal)  |
+|  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302067.jpg?nolink&300 |}}  |  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302068.jpg?nolink&300 |}}  | Front and back of one of four submodules:\\ \\ __Front: 4x board with each:__\\ 1x Front 68pol connector to NI-ADC (8 channel)\\ <color grey>⇒ 2x RJ45 (4 channel) = Σ 8x RJ45</color>\\ 1x LEMO 00 monitor output\\ <color grey>⇒ 4x trigger @ X2 connector</color>\\ \\ __Back:__\\ 1x LEMO 00 Timing input\\ 8x LEMO 00 diff. analog input per trafo (internal)  |
 |  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302069.jpg?direct&600 |}}  || View inside analog modul  |
 |  {{ :projects:maps:mapsadapter:analogsignalmodul:s7302070.jpg?nolink&600 |}}  || modules internal back side  |

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