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====== Code für CPLD1 ======
===== Erläuterungen =====
^ Varable ^ Constante ^^
| s(t) = "1ms-Takte"\\ t = Trafoindex Laufvariabel\\ r = Reihe/Spalte d. Anzeige Laufvariabel\\ m = Laufvariable Stelle im Bitstring stroke\\ \\ **trafosignals[5..0]** Bitstring[5..0] (RRRTP) (K)\\ **Stroke[4..0]** = Bitstring[4..0] Eingangsvariable 1ms-Takt\\ **Mode[2..0]** = Bitstring Mode[1..0] Eingangsvariable ^ c_num_trafos | = Trafoanzahl = 8 |
| ::: ^ c_stroke_wl | = Länge Bitstring[4..0] = 5 |
| ::: ^ | |
| ::: ^ c_mode_wl | = Länge Bitstring Mode[1..0] = 3 |
| ::: ^ | |
| ::: ^ c_measurement_range_wl | = Länge Bitstring der Balkenanzeige = 6 (5xRb + P) |
| ::: ^ c_num_measurement_ranges | = Anzahl Messbereich als Integerzahl = 3 |
| ::: ^ c_knob_select_wl | = Länge Dekoder Bitstring[1..0] = 2 |
| ::: ^ c_cpld1_period_wl | = Länge Perioden Bitstring[5..0] = 50 |(
| p_drive_led_rows: Prozess LED-Treiber |||
Eingestellt am 9.5.2024 --- erstellt am 7.5.2024.
===== Code Orginal =====
--------------------------------------------------------------------------------
-- Copyright 2023
-- GSI Helmholtzzentrum fuer Schwerionenforschung GmbH
-- Planckstr. 1, 64291 Darmstadt
-- Author: Rene Geissler, r.geissler@gsi.de
--------------------------------------------------------------------------------
--
-- functional description
-- TODO
--
--------------------------------------------------------------------------------
-- VHDL standard: VHDL-2002
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.constant_package.all;
use work.type_package.all;
entity cpld_1 is
port(
--clk_0p001 : in std_logic;
--clk_10 : in std_logic;
--clk_10_n : in std_logic;
trafo_signals : in t_trafo_signals;
stroke : in std_logic_vector(c_stroke_wl - 1 downto 0);
period_counter : in std_logic_vector(c_cpld1_period_wl - 1 downto 0);
knob_select : in std_logic_vector(c_knob_select_wl - 1 downto 0);
display_mode : in std_logic_vector(c_mode_wl - 1 downto 0);
decode_signal : in std_logic;
led_rows_red : out std_logic_vector(c_num_trafos - 1 downto 0);
led_rows_green : out std_logic_vector(c_num_trafos - 1 downto 0)
);
end cpld_1;
architecture behavioral of cpld_1 is
signal mode : unsigned(c_mode_wl - 1 downto 0);
begin
mode <= unsigned(display_mode);
-- only modes 0 and 1 are implemented yet
p_drive_led_rows : process(stroke, trafo_signals, mode)
variable s : integer;
variable r : integer;
begin
led_rows_red <= (others => '0');
led_rows_green <= (others => '0');
s := to_integer(unsigned(stroke)); -- 1ms stroke index in 20 ms UNILAC cycle (range 0 to 19)
for t in 0 to c_num_trafos - 1 loop
-- common to modes 0 and 1
if mode <= to_unsigned(1, c_mode_wl) then
-- Acht waagrechte Balken mehr oder weniger ausgesteuert!
r := to_integer(unsigned(trafo_signals(t)(c_measurement_range_wl - 1 downto 0))); -- measurement range (range 1 to 5)
for m in 0 to c_num_measurement_ranges - 1 loop
if s = m or s = 6 + m then
-- mode 0
if mode = to_unsigned(0, c_mode_wl) then
if r >= m + 1 then
led_rows_green(t) <= '1'; -- display measurement ranges in cycles 0 .. 4 and 6 .. 10
end if;
-- mode 1
else
if m < c_num_measurement_ranges - 1 then -- falsch: c_measurement_range_wl
led_rows_green(t) <= trafo_signals(t)(m); -- display binary measurement ranges in cycles 0 .. 2 and 6 .. 8
end if;
end if;
end if;
end loop;
if s = 5 or s = 6 + 5 then
led_rows_green(t) <= trafo_signals(t)(4); -- display trafo present signal in cycles 5 and 11
--led_rows_red(t) <= trafo_signals(t)(3); (Testfunktion)
end if;
end if;
end loop;
end process;
end behavioral;
----
☚ [[projects:maps21:s:dcont:code:code|CPLD1]] ★