GSI - BEA Wiki

User Tools

Site Tools

Trace:
projects:maps21:s:dcont:code:pins2:pins2

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision 		Previous revision
projects:maps21:s:dcont:code:pins2:pins2 [2024/05/07 10:53]
carsten 		projects:maps21:s:dcont:code:pins2:pins2 [2024/09/17 09:48] (current)
carsten [Pin-Mapping2]
Line 1: Line 1:
-====== PINs2-Mapping ======+☚ [[projects:maps21:s:dcont:code:code|Zurück]] ★ 
 + 
 +====== Pin-Mapping2 ====== 
 + 
 +Zuletzt geholt am 17.9.2024 geschreiben am 9.7.2024: 
 + 
 +%%     MAPS_CPLD_Gateware/src/constraints/ %% "cpld_2.ufc" Konstantendatei! 
 +==== aktuelle Version ====
  
 <code vhdl> <code vhdl>
 +# location constraints
 +
 +net clk_0p001 loc = p32;
 +#net clk_10    loc = p30;
 +#net clk_10_n  loc = p38;
 +
 +net clamp_pulses<0> loc = p20;
 +net clamp_pulses<1> loc = p21;
 +net clamp_pulses<2> loc = p22;
 +net clamp_pulses<3> loc = p23;
 +net clamp_pulses<4> loc = p24;
 +net clamp_pulses<5> loc = p25;
 +net clamp_pulses<6> loc = p26;
 +net clamp_pulses<7> loc = p27;
 +</code>
 +<color /yellow>net clamp_pulse_no loc = p59;</color>
 +<code vhdl>
 +net rotary_switch<0> loc = p51;
 +net rotary_switch<1> loc = p52;
 +net rotary_switch<2> loc = p50;
 +
 +net stroke<0> loc = p100;
 +net stroke<1> loc = p101;
 +net stroke<2> loc = p102;
 +net stroke<3> loc = p103;
 +net stroke<4> loc = p106;
 +
 +net period<0> loc = p85;
 +net period<1> loc = p86;
 +net period<2> loc = p88;
 +net period<3> loc = p87;
 +net period<4> loc = p83;
 +net period<5> loc = p82;
 +
 +net manual_range<0> loc = p45;
 +net manual_range<1> loc = p46;
 +net manual_range<2> loc = p48;
 +net manual_range<3> loc = p49;
 +
 +net display_mode<0> loc = p56;
 +net display_mode<1> loc = p57;
 +net display_mode<2> loc = p58;
 +
 +# LEDs : correct 180° rotation of display PCB for all columns and for rows 0 to 7
 +#        rows 8 and 9 not correctable due to pins not conntected to CPLD 1 => row 9 is located at the top
 +
 +net led_rows_red<7> loc = p117;
 +net led_rows_red<6> loc = p118;
 +net led_rows_red<5> loc = p119;
 +net led_rows_red<4> loc = p120;
 +net led_rows_red<3> loc = p121;
 +net led_rows_red<2> loc = p124;
 +net led_rows_red<1> loc = p125;
 +net led_rows_red<0> loc = p126;
 +# rows 8 and 9 not correctable due to pins not conntected to CPLD 1
 +net led_rows_red<8> loc = p128;
 +net led_rows_red<9> loc = p129;
 +
 +net led_rows_green<7> loc = p9;
 +net led_rows_green<6> loc = p10;
 +net led_rows_green<5> loc = p11;
 +net led_rows_green<4> loc = p12;
 +net led_rows_green<3> loc = p13;
 +net led_rows_green<2> loc = p14;
 +net led_rows_green<1> loc = p15;
 +net led_rows_green<0> loc = p16;
 +# rows 8 and 9 not correctable due to pins not conntected to CPLD 1
 +net led_rows_green<8> loc = p17;
 +net led_rows_green<9> loc = p19;
 +
 +net led_columns<6> loc = p34;
 +net led_columns<5> loc = p35;
 +net led_columns<4> loc = p39;
 +net led_columns<3> loc = p40;
 +net led_columns<2> loc = p41;
 +net led_columns<1> loc = p43;
 +net led_columns<0> loc = p44;
 +
 +# timing constraints
 +
 +net clk_0p001 period = 1000000;
 +#net clk_10    period = 100;
 +#net clk_10_n  period = 100;
 +
 +</code>
 +
 +==== Vorversion ====
 +
 +p53 (DECODE) nicht gesetzt?
 +
 +<code vhdl>
 +# location constraints
 +
 +net clk_0p001 loc = p32;
 +#net clk_10    loc = p30;
 +#net clk_10_n  loc = p38;
 +
 +net clamp_pulses<0> loc = p20;
 +net clamp_pulses<1> loc = p21;
 +net clamp_pulses<2> loc = p22;
 +net clamp_pulses<3> loc = p23;
 +net clamp_pulses<4> loc = p24;
 +net clamp_pulses<5> loc = p25;
 +net clamp_pulses<6> loc = p26;
 +net clamp_pulses<7> loc = p27;
 +
 +net rotary_switch<0> loc = p51;
 +net rotary_switch<1> loc = p52;
 +net rotary_switch<2> loc = p50;
 +
 +net stroke<0> loc = p100;
 +net stroke<1> loc = p101;
 +net stroke<2> loc = p102;
 +net stroke<3> loc = p103;
 +net stroke<4> loc = p106;
 +
 +net period<0> loc = p85;
 +net period<1> loc = p86;
 +net period<2> loc = p88;
 +net period<3> loc = p87;
 +net period<4> loc = p83;
 +net period<5> loc = p82;
 +
 +net manual_range<0> loc = p45;
 +net manual_range<1> loc = p46;
 +net manual_range<2> loc = p48;
 +net manual_range<3> loc = p49;
 +
 +net display_mode<0> loc = p56;
 +net display_mode<1> loc = p57;
 +net display_mode<2> loc = p58;
 +
 +net led_rows_red<0> loc = p117;
 +net led_rows_red<1> loc = p118;
 +net led_rows_red<2> loc = p119;
 +net led_rows_red<3> loc = p120;
 +net led_rows_red<4> loc = p121;
 +net led_rows_red<5> loc = p124;
 +net led_rows_red<6> loc = p125;
 +net led_rows_red<7> loc = p126;
 +net led_rows_red<8> loc = p128;
 +net led_rows_red<9> loc = p129;
 +
 +net led_rows_green<0> loc = p9;
 +net led_rows_green<1> loc = p10;
 +net led_rows_green<2> loc = p11;
 +net led_rows_green<3> loc = p12;
 +net led_rows_green<4> loc = p13;
 +net led_rows_green<5> loc = p14;
 +net led_rows_green<6> loc = p15;
 +net led_rows_green<7> loc = p16;
 +net led_rows_green<8> loc = p17;
 +net led_rows_green<9> loc = p19;
 +
 +net led_columns<0> loc = p34;
 +net led_columns<1> loc = p35;
 +net led_columns<2> loc = p39;
 +net led_columns<3> loc = p40;
 +net led_columns<4> loc = p41;
 +net led_columns<5> loc = p43;
 +net led_columns<6> loc = p44;
 +
 +# timing constraints
 +
 +net clk_0p001 period = 1000000;
 +#net clk_10    period = 100;
 +#net clk_10_n  period = 100;
  
  
  
-</vhdl> 
  
 +</code>
projects/maps21/s/dcont/code/pins2/pins2.1715071999.txt.gz · Last modified: 2024/05/07 10:53 by carsten

Page Tools

Donate Powered by PHP Valid HTML5 Valid CSS Driven by DokuWiki