Differences

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--- ds:software:hdl [2016/02/10 12:14]
pmiedzik [FMC]
+++ ds:software:hdl [2016/07/12 13:07] (current)
pmiedzik [Register description]
@@ Line 39: / Line 39: @@
 ====== FMC ======
-  * repository:
+  * repository: LOBI IP Cores
     * https://github.com/qermit/lobi-ip_cores
     * http://gitorious.gsi.de/lobi/lobi-ip_cores
-  * repository:
+  * repository: FMC HDL
     * https://github.com/qermit/fmc-hdl
     * http://gitorious.gsi.de/lobi/fmc-hdl
@@ Line 50: / Line 50: @@
 ^ BusPath ^ VendorID ^ Product ^ BaseAddress(Hex) ^ Description ^
-| 1 |  ''000000000000????'' | ''????????'' | ''0x????'' | WB4-Bridge-GSI |
+| 1 |  ''000000000000????'' | ''????????'' | ''0x0000'' | WB4-Bridge-GSI |
-| 2 |  ''000000000000????'' | ''????????'' | ''0x????'' | WR-Periph-1Wire |
+| 2 |  ''000000000000????'' | ''????????'' | ''0x1000'' | WR-Periph-1Wire |
-| 3 |  ''000000000000????'' | ''????????'' | ''0x????'' | WB-I2C-Master |
+| 3 |  ''000000000000????'' | ''????????'' | ''0x1100'' | WB-I2C-Master |
-| 4 |  ''000000000000????'' | ''????????'' | ''0x????'' | [[ds:software:hdl#wb_gpio_raw|WB-GPIO-RAW]] |
+| 4 |  ''000000000000????'' | ''????????'' | ''0x1200'' | [[ds:software:hdl#wb_gpio_raw|WB-GPIO-RAW]] |
-| 5 |  ''000000000000????'' | ''????????'' | ''0x????'' | [[ds:software:hdl#wb_scaler|WB-SCALER]] |
@@ Line 68: / Line 68: @@
 ^ Register     ^ Address ^ Default Value ^ Description ^
-| SC             | **0b000    ** | 0x00000001 | Status and controll
+| SC             | **0b000    ** | 0x00000001 | Status and control |
 | CounterMap     | **0b001    ** | 0x08040201 |
-| LatchMap       | **0b010    ** | 0x00000010 |
+| LatchMap       | **0b010    ** | 0x00000010 | Bit 8 wired to software latch |
-| StartStopMap   | **0b011    ** | 0x00000080 |
+| StartStopMap   | **0b011    ** | 0x00000080 | Bit 8 wired to software start/stop |
 | CCounter       | **0b100    ** | 0x00000000 |
 | LCounter       | **0b101    ** | 0x00000000 |
@@ Line 88: / Line 88: @@
 |  5 |  (0x20) | load_current  |  w  |
 |  6 |  (0x40) | load_fifo     |  w  |
+|  7 |  (0x80) | software_latch     |  w  |
 |  11 - 8 | | counter_ovf   |  r  |
+|  12 | | load_current_auto |  rw  | FIXME |
@@ Line 107: / Line 109: @@
 ^ Register     ^ Address ^ Default Value ^ Description ^
-| CODR           | **0b000    ** | 0x00000000 | clear output register
+| CODR           | **0b000    ** | 0x00000000 | clear output register |
-| SODR           | **0b001    ** | 0x00000000 | set output register
+| SODR           | **0b001    ** | 0x00000000 | set output register |
-| DDR            | **0b010    ** | 0x00000000 | data direction register
+| DDR            | **0b010    ** | 0x00000000 | data direction register |
-| PSR            | **0b011    ** | 0x00000000 | pin state register
+| PSR            | **0b011    ** | 0x00000000 | pin state register |
-| TR             | **0b100    ** | 0x00000000 | termination register
+| TR             | **0b100    ** | 0x00000000 | termination register |
-| AFR            | **0b101    ** | 0x00000000 | alternative function register
+| AFR            | **0b101    ** | 0x00000000 | alternative function register |

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