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--- ds:projects:cryring:bpmboot [2020/02/05 14:50]
tobiashoffmann [FPGA paritial reset]
+++ ds:projects:cryring:bpmboot [2020/02/11 13:00] (current)
tobiashoffmann [AFC 3.1 MMC Programming HowTo]
@@ Line 55: / Line 55: @@
-==== AFC 3.1 MMC Programming HowTo ====
+===== AFC 3.1 MMC Programming HowTo =====
-MMC:
+=== MMC: ===
+Install LPCXpresso on Linux PC.
 LPC_Link (1) on table with AFC on table
@@ Line 64: / Line 66: @@
 USB Cable connected to PC and LPC_Link
-dedicated cable from Piotr to JTAG in the middle of AFC with cables moving to FMC connectors
+{{:ds:projects:cryring:20200205_144018.jpg?400|}}
+dedicated cable from Piotr to JTAG in the middle of AFC with cables heading to FMC connectors
 on LPC Link J4 left row with Black = Pin15
-enter command:
+enter command on Linux PC:
 dfu-util -d 0x0471:0xdf55 -c 0 -t 2048 -R -D /usr/local/lpcxpresso/lpcxpresso/bin/LPCXpressoWIN.enc
@@ Line 76: / Line 80: @@
-AFC Firmware (Sirius):
+=== AFC Firmware (Sirius): ===
+Before any FPGA configuration can be performed, you need to switch SCANSTA JTAG switch. Untill than FPGA won't be visible in Vivado. You will find instructions {{ :ds:projects:cryring:afc_afck_scansta_guide.pdf |here}}
+jtag_scansta.tcl (TCL-Script):
+<file>
+#set JTAG */xilinx_tcf/Xilinx/*
+set JTAG */xilinx_tcf/Digilent/*
+catch open_hw
+catch {connect_hw_server -url localhost:3121}
+get_hw_targets
+current_hw_target [get_hw_targets $JTAG]
+set_property PARAM.FREQUENCY 3000000 [get_hw_targets $JTAG]
+catch {open_hw_target -jtag_mode 1}
+run_state_hw_jtag reset
+run_state_hw_jtag idle
+scan_ir_hw_jtag 8 -tdi 00
+scan_ir_hw_jtag 8 -tdi a0
+scan_ir_hw_jtag 8 -tdi a5
+scan_dr_hw_jtag 8 -tdi 5a
+scan_ir_hw_jtag 8 -tdi c3
+#On proper setup last step should return 0x00
+scan_dr_hw_jtag 8 -tdi 5a -tdo 00
+close_hw_target
+open_hw_target
+</file>
+Flash Chip on AFC 3.1 for FPGA Firmware: mt25ql256-spi-x1_x2_x4
+To add click with right mouse button on FPGA in Vivado Hardware Manager:
+{{:ds:projects:cryring:1fpmfaokmedhlmjdm.png?400|}}
+Then select the right SPI flash:
+{{:ds:projects:cryring:2mgfjnodfapnggfji.png?400|}}
+You will be asked if you want to program configuration memory device. You can cancel it as MCS configuration file must be generated first.
+To generate MCS configuration file select Tools -> Generate Memory Configuration File...
+In the window please select right Memory Part, Filename (it's output file name) and tick that the file is to Load bitstream files. Then in the Bitfile input select your bitstream and click OK:
+{{:ds:projects:cryring:3ajacbmiiffbcdncp.png?400|}}
+To program SPI flash click on the mt25ql256-spi-x1_x2_x4 in Hardware Manager tree and select Program Configuration Memory Device...
+{{:ds:projects:cryring:4kpgcemgabkpjonpm.png?400|}}
+In the configuration window select created Configuration file and click OK:
+{{:ds:projects:cryring:5fknakblnoicfbhne.png?400|}}
+SPI flash will be erased and programmed with new gateware.
-Flash Chip on AFC 3.1 for FPGA Firmware: N25Q256A

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