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projects:maps:mapsadapter:rahmenpulsmodul:overview [2020/02/01 16:06] carsten [The realized signal flow through the for IO-connectors of PXI-7811R is:] |
projects:maps:mapsadapter:rahmenpulsmodul:overview [2020/02/03 10:53] carsten [Internal pictures] |
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Yellow inputs receive " | Yellow inputs receive " | ||
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+ | To get an impression see folowing Dokument for UNILAC-Timing zones (Thanks to C.Andre): | ||
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+ | The idaer shout be to combine all those AC-transformators inside the same time zone at same ADCs for being sampled from the same trigger! | ||
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===== Designated Diploma Signal Flow to NI-FPGA " | ===== Designated Diploma Signal Flow to NI-FPGA " | ||
- | Old setup:\\ | + | Old setup: |
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+ | ===== Infos zu Trafos und Timing ===== | ||
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+ | [[projects-internal: | ||
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☚ [[projects: | ☚ [[projects: |